For the Broadband & Broadcast department in Erlangen, the Fraunhofer Institute for Integrated Circuits IIS is currently seeking
Master Thesis Students or Interns for the Topic: Short Block Length Codes

The Broadband & Broadcast (BB) department is active in the areas of mobile communications, satellite communications, Internet-of-Things and automotive communication systems. We take new concepts and algorithms from theory, implement them and test them in simulations and in prototypes in our labs and in the field. For instance, we operate a commercial LTE-Advanced testbed network, which we use to check the interoperability of our prototypes with the LTE standard. In short, the BB department establishes a bridge between communication theory and its employment in practice.

During the past sixty years, a formidable effort has been channeled in the research of capacity-approaching error correcting codes. Initially the attention was directed to short and medium-length linear block codes, mainly for complexity reasons, while more powerful longer codes became dominant later. The interest in short and medium-block length codes (i.e., codes with information words of length 50 to 1000 bits) has been rising again recently, mainly due to emergent applications requiring the transmission of short data units like machine-type communications, smart metering networks, remote command links and messaging services. Therefore, we aim to make surveying about the possible short length block codes taking into consideration the performance and complexity. The outcome of this work should be the implementation of different short length block codes such as short binary LDPC and turbo codes, and their non-binary forms; a polar code under successive cancellation decoding; BCH codes and soft decision Reed Solomon codes.

Your responsibilities:
• Learning about different types of block codes and their decoding techniques
• Design and implementation of short block length encoders and decoders in Python or Matlab.
• Making comparison between the different codes with respect to the performance and complexity
• Optional: calculating how many arithmetic operations (multiplications and additions) are needed for each code.

Was Sie mitbringen

You …
• know the basics of Forward Error Control coding techniques (mandatory)
• have knowledge in Python or Matlab programming (mandatory)
• are aware of Register-Level-Transfer implementation, e.g. VDHL (advantageous)

Was Sie erwarten können

• An open and cooperative working environment
• Collaboration in interesting and innovative projects
• Many opportunities to gain practical experience

The thesis will be assigned and carried out in accordance with the rules of your university. For this reason, please discuss the thesis with a professor who can advise you over the course of the project. The duration for the thesis should be 6 months and it can be started from now on. The thesis will be supervised by Xabier Abancens.

Please send your application in PDF format, including cover letter, CV, latest transcripts of records, references and the date of your earliest possible start to Xabier Abancens and cite
ID number 40122.

Fraunhofer-Institut für Integrierte Schaltungen IIS
Am Wolfsmantel 33
91058 Erlangen

Kennziffer: 40122 Bewerbungsfrist: